Mixed Signal Design Verification Engineers
Chipright seeks highly motivated and experienced AMS Verification engineer to work in developing and delivering IP to our customers. This is a fantastic opportunity for talented engineers to work within a team of highly experienced engineers.


Requirements

 	
5+ years AMS Verification/Validation experience
 	
Definition of MSDV plans for mixed signal chip designs, following the AMS requirement driven DV flow
 	
Definition and implementation of top-level testbenches using System Verilog, testcases and verification attributes such as checkers, stimulus packages and similar components. UVM knowledge is a plus.
 	
Develop behavioral models for analog blocks using Verilog, develop self-checking  mixed-signal testbenches to verify and establish model vs. schematic equivalence
 	
Fluency with Cadence-based AMS flow- Create test schematics, config views, ADE-L Interface, connect modules, Simulator options etc.
 	
Must be comfortable with batch mode- based simulation bring-up
 	
Ability to comprehend UNIX shell scripts
 	
Debug test failures, follow up on design issues and drive to closure
 	
Regular reporting of status, completion %, activities, risks, impediments, etc.

Desirable

 	
A team player with good communication skills with previous experience in delivering solutions / services to a multi-national client