2x Senior DFT Engineer (Remote) - Tessent MBIST
8+ Years Experience
Responsibilities:
Develop DFT architecture, collaborate with design and verification teams.
Execute scan insertion, ATPG using Tessent tools, optimize scan chains.
Implement memory BIST, repair solutions, and boundary scan (JTAG) structures.
Contribute to AMS DFT for mixed-signal designs, perform testability analysis.
Qualifications:
8+ years of DFT experience with Mentor Graphics/Siemens tools.
Proficiency in scan insertion, ATPG, memory BIST, and JTAG.
Strong debugging skills
Excellent communication and collaboration skills.
Location:
Remote (Europe)
Must be within CET (+/- 2 hours)

If you are interested please email me at natalia.bisaga@chipright.com