-Full IC top level implementation and verification ranging from high power automotive to RF low power medical solutions.
 	
 -Block level implementation and verification on Pads, VCOs, Mixers, RF Frontend, ADCs, Filters and Regulators.
 	
 -Cadence and Synopsys schematic capture, simulation, layout, parasitic extraction and post extraction simulation.
 	
 -Full chip layout verification with Calibre, Assura, Herculese, Dracula and DIVA. DRC, LVS, DFM, Antenna, Voltage Storm. Virtuoso XL, L-EDIT