E-36084

Area of expertise: ASIC Verification
Core Technologies: 5G
Experience: 20 years
Time On Site: 10%
Hardware:
VHDL/System Verilog/FPGA/ASIC
UVM Verification flow
Validation

Embedded Systems:
ARM CORTEX M0 
6 bit H430 Microcontroller
C/C++ Development for RTOS(QNX, Debian, TS-Linux)
Synopsys Architect (HS48, NPU, VPX) processor.
Bus Systems(DW_IIP, AXI, SPI, Safespi, I2C ICAP, JTAG)

Programming Language:
VHDL/ System Verilog/UVM
C/C++
Matlab
Automake/Make scripting
Perl/Ruby
TCL / Shell scripting

Tools:
HDL Simulator(Cadence Xcellium, Synopsys VERDI)
Xilinx(Vivado, EDK, XPS, PlanAhead, SDK, IP Generator, Chipscope Pro, System Generator)
Apache (Totem, Redhawk)
Matlab(Simulink, HDL Code Designer)
Automake, Qmake, Cmake
QNX Momentics, Eclipse, Emacs
Microsoft (Visual Studios, Office, Windows