Experienced Analog and Digiatl Mixed Signal Engineer. Develop SV test cases to verify the top-level integration of specific features of SoCs Delivered work packages in both mixed signal and digital oriented testbenches Develop from scratch testbenches and UVCs for certain digital blocks to be re-used in the top level testbench Generic target block examples: xMII interface, PCS, special I/O features, Register functionality, linear regulator, ADC, DAC etc. Integrate the provided C-Models in the scoreboard of the digital block level UVC Create the necessary verification elements to guarantee proper sign-off Submit and track tickets for found issues Create and update vplan for all the workpackages Provide waveform/coverage reports for each workpackage Solve simulation issues. Implement verification for Mixed-Signal ASICs consisting in planning and creating a work breakdown structure, executing complete verification workpackages for any type of circuit at all scopes: block / module or top.