E-13794

Area of expertise: ASIC Design
Core Technologies: Telecommunications
Experience: 15 years
Time On Site: 25%
FPGA/ASIC Design/Verification Engineer doing Functional /Implementation Specifications,  Digital Design RTL, VHDL / Verilog / System Verilog coding , Design Verification, Testbenches , Synthesis ,DFT insertions ,Timing closure