-Expertise in SoC, Subsystem, ASIC, and IP level functional verification of complex design
 	
-Expertise in UVM, System Verilog and Specman-e/eRM language
 	
-Testbench development from scratch using the UVM-SV
 	
-Formal Verification expert using assertion language SVA and formal tools like JasperGold/VC Formal/OneSpin
 	
-Experience in SoC level Boot, Initialization and C-Firmware executions
 	
-Expert industry standard protocols:
 	
 -AMBA: APB, AHB/AHB5, AXI3/AXI4/AXI5, ACE, AXI4-Stream, ATB
 	
 -Memory: DDRs/LPDDRs and DFI3.0/DFI4.0 bus protocols
 	
 -High Speed Interface: NoC (Network on Chip), Ethernet and CPRI (GSM, LTE, 4G), MIPI-DSI, PHYs etc
 	
 -Peripheral Interface: JTAG, I2C, 12S, SPI/QSPI/OSPI
 	
 -Others: OCP
 	
-Protocol Verification IP (VIP) or UVC development from scratch
 	
-Experience in Verilog and VHDL RTL language and understanding
 	
-Netlist Verification (Gate Level Simulation)
 	
-Low power verification methodology using UPF