AMS Verification Engineer

 	
 -Top level verification
 	
 -Maintaining config and maestro view files for dedicated IPs
 	
 -Writing tcl based scenarios
 	
 -Modules: ATB, Chirp (local LDOs, Charge Pump, Phase
 	
 -Frequency Detector and VCO), TX
 	
 -Tools: Cadence Virtuoso, Cadence Simvision, Vmanager
 	
 -Flow: Direct test with control trough digital
 	
 -Languages: SystemVerilog, tcl, verilogam