E-24728
Area of expertise: Digital Mixed Signal Verification
Core Technologies: 5G
Experience: 10 years
Time On Site: 0%
Highly experienced Mixed Signal and Digital Verification - Cadence: Incisive, Virtuoso ? Schematic, Layout, ADL, ADXL, AMS - UVM, System Verilog, Specman, Verilog AMS - C, C++, Perl - Unix shell scripting - ClearCase version control Development of UVM verification environment in SV for sub-system and top level, includingcheckers, coverage, monitors, scoreboards with focus on reusability Constraint random functional tests Development of digital verification plan and verification strategies Running regressions, generating verification reports Development of top level tests in C language for TLV (Top Level Verification ? verification of the DPD integrated with DAC and ADCs and analog antenna model) Development of mixed-signal tests and checkers in Verilog-AMS Running and debugging top level simulations (analog, digital and software) Development of fault injection tests, scripts and reports Development of Verilog AMS models for analog blocks
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+353 91 444 168
info@chipright.com
Unit 8B, Galway Technology Centre, Galway, Ireland