E-48960

Area of expertise: Analog Layout
Core Technologies: Medical
Experience: 21 years
Time On Site: 0% 
    
 	
  • Senior Analog Layout Engineer 20+ year's experience
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  • -Full custom Layout experience
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  • -Experience producing Planar Bi/CMOS, DRC/ERCLVS/DFM mixed signal layout, on or under size constraint, on time, from schematic database (DFII) to GDSII
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  • -Experience working on 180nm - 22nm tech nodes
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  • -Experience working on various analog and rf blocks including LDOs, Receivers, Transmitters, LOs
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  • -Experience in Low Voltage/ High Voltage BiCMOS
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  • -Tools: EDA - Cadence Virtuoso Layout L/XL/GXL (Open Source), Silicon Frontline's R3D simulator, Virtuoso Place and Route experience.
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  • -Verification: (DRC/LVS/ERC/Antenna/DFM), Mentor Graphics - Calibre, Cadence - ASSURA, PVS, IC Manage & Synchronicity and ClioSoft SOS, Vault IP management.
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