5G

The 5G technology node is positioned to be the standard for mobile communications technology into the future. The standard is evolving and being implemented within R&D programs in the telecommunications market sector. Businesses and consumers will benefit from high-speed connectivity, high capacity, low latency, ultra-reliability, and security across multiple applications because of it being deployed globally.

Chipright has delivered design services within the 5G technological domain by utilizing a proven pool of highly skilled senior level engineering resources. We have the capacity to supply the market with the right skill at the right price in the right location at the right time.

New clients often ask us about projects we have worked on and implemented over time in the 5G market space. They also ask us about the resource pool we use on these projects. We respect the curiosity but also respect our clients NDA’s. Thus, whilst we are restricted from conveying specific information about the R&D technological projects we continually work on, we can provide a brief snapshot of some of the work without disclosing our customers detailed project information here.

Case Study 1 – SOC verification of 5G Technology Base Transceiver Station

• Review of design specification and functional requirements for SoC
• Set up and configure test bench architecture – UVM
• Define and capture functional coverage
• Define and design the score boards, monitors and check points
• Verification of the 5G Down link TDD and feedback processing verification.
• Low power, power estimation, UPF
• Gate Level Simulation

Case Study 2 – Wireless System Transceiver Design (5G Mobile, Wifi) 

• RX / TX Front End Specification & Design
• LO Distribution
• Power Detectors
• IF amplifiers
• Up Conversion Mixers
• Calibration Loops
• Bandpass Filters

Case Study 3 – PLL System & Circuit Design  

• PLL System Design – Modelling  (Integer-N, Fractional-N)
  • Synthesizers including integer-N and Fractional-N PLLS suitable for 5G mobile application in cutting edge SOI process
• PLL Circuit Design
  • Charge Pumps, Dividers, PFD’s, XTAL’s, Pre-scalers
  • LC-VCO’s, Ring Oscillators, Injection-Locked Oscillators
  • RF LO Generation / Distribution chains

Case Study 4 – FPGA implementation of a CPRI subsystem – proof of concept

• Review of LTE standard
• Define and scope out the high-level functional verification architecture
  • Hardware based
    • FPGA RTL verification
    • RTL Verification environment utilizing OVM / UVM
    • Utilize verification IP infrastructure in the RTL environment
  • Software based
    • C based environment
    • Configure the FPGA in a lab environment using Quartus toolsets
    • Bring up of the device in the lab environment
    • Debug and enhance the design within the lab setting
  • Work with RTL design team
    • To integrate their design into the verification environment
    • To communicate bug hunting status and RTL verification status
  • Deliver the FPGA design & operating environment to end client
    • Where the radio subsystem on the FPGA was used to make calls in their environment – to show and deliver the proof of concept of the design